WLAN Implementation Engineer, Sr

Responsibilities

• Responsible for next-generation WLAN hardmacro implementation using advanced methodologies and tools in 6nm and beyond process technologies.
• Work on physical and power-aware synthesis, logic equivalence, constraints generation and validation, and static timing analysis.
• Optimize data path design for low-area, low-power, and high-speed using advanced synthesis features such as MCMM, SAIF, and multibit mapping.
• Collaborate with physical design, CAD, IP, and Design Technology teams on timing closure and flow script/tool development.
• Perform netlist-level ECOs manually or using conformal ECO tools.
• Mentor junior team members and utilize automation skills through scripting.

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field.
• 3 to 5 years of experience in SOC logic synthesis and timing constraints.
• Proficiency in scripting languages such as Tcl or Perl.
• Strong knowledge of STA tools like PrimeTime.

Preferred Qualifications

• Experience with Synthesis tools (DCG/FC/Genus) and Formal Verification (LEC/Formality).
• Deep expertise in STA timing analysis basics, including AOCV/POCV concepts, CTS, and managing timing constraints.
• Hands-on experience with STA tools such as PrimeTime or Tempus.
• Experience with timing convergence at both Chip-level and Hard-Macro level.
• Understanding of low power and power simulations using ptpx, power artist, or conformal low power.
• Familiarity with Digital Communications or LTE/802.11 protocols.

About the Company

Qualcomm is a global leader in wireless technology, developing products that power the world's most advanced mobile and connected devices. We foster a supportive, inclusive culture where the brightest minds work together to solve the most complex engineering challenges.