Verification Engineer

Responsibilities

• Define and implement comprehensive SoC verification strategies and plans covering all functional and performance aspects
• Lead the development of UVM/SystemVerilog-based verification environments for complex SoC/IP subsystems
• Drive end-to-end SoC verification, including the integration of IP-level environments into SoC-level testbenches
• Develop and maintain test plans, test cases, and coverage models including functional, code, and assertion coverage
• Create and debug test scenarios, sequences, and scoreboards to validate system functionality
• Utilize simulation, emulation, and formal verification tools to ensure design correctness
• Analyze failures, debug root causes, and collaborate with design teams for timely resolution
• Drive coverage closure and sign-off criteria to ensure high-quality deliverables
• Mentor junior engineers and provide technical leadership within the verification team
• Collaborate with cross-functional teams including RTL design, architecture, firmware, and physical design

Requirements

• 6+ years of experience in semiconductor verification
• Expert knowledge of UVM and SystemVerilog
• Proven experience in SoC verification strategies and test plan development
• Proficiency in developing coverage models and driving coverage closure
• Strong debugging skills and experience with complex SoC protocols

Preferred Qualifications

• Experience with low-power verification methodologies such as UPF or CPF
• Knowledge of common SoC protocols including AXI, AHB, APB, PCIe, USB, or Ethernet
• Exposure to hardware emulation platforms like Palladium, Veloce, or ZeBu
• Familiarity with formal verification methodologies

About the Company

NXP Semiconductors enables a smarter, safer, and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP pushes boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.