Systems Validation Engineer

About the Company

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference.

Responsibilities

• Author and own the L10 system debug guide for factory failure analysis
• Own end-to-end escalation, debug, and resolution of L10 hardware failures
• Lead bring-up and integration across accelerator cards, interconnects, power, and thermal domains
• Perform system-level debug across hardware, firmware (BMC, BIOS, CPLD), and software
• Partner with CMs to validate systems and gate production ramp
• Build ad-hoc instrumentation, automation scripts, and debug workflows
• Run sustained workloads using real model variants under thermal and power stress
• Drive issue closure across cross-functional engineering teams

Requirements

• 10+ years in system validation or platform bring-up with L10 (tray/rack) integration ownership
• Hands-on signal integrity and power integrity debug (SerDes, PCIe Gen5/6, Ethernet, HBM)
• Ability to build quantitative platform readiness coverage models
• Strong Linux and Python/Bash scripting skills
• Experience validating AI accelerator or high-performance compute platforms
• Ability to travel overseas to contract manufacturers

Preferred Qualifications

• Familiarity with BMC/IPMI, UEFI/BIOS bring-up, and CPLD firmware debug
• Experience with HBM or CSRAM memory subsystem validation
• Background validating multi-rack or tray-level systems at hyperscaler scale
• Exposure to large-model inference workloads
• Prior work with ODM/CM partners (Pegatron, Foxconn, Wistron, etc.)