Staff/Senior Staff Engineer: Static Timing Analysis (STA) Lead

Responsibilities

• Drive full-chip SOC timing closure across all corners and modes
• Partner with Architecture, RTL, and DFT teams to validate timing feasibility and optimize logic
• Proactively identify and resolve structural timing issues and congestion early in the design cycle
• Perform complex timing tasks including CPPR/CRPR analysis, NoC timing, and SDC constraint validation
• Architect and build automation utilities using Tcl, Python, or Perl to accelerate timing sign-off
• Guide physical design teams on floorplanning, clock tree synthesis (CTS), and placement optimizations to meet PPA targets

Requirements

• 9 to 14 years of hands-on experience in STA and Timing Closure on advanced process nodes (7nm, 5nm, or below)
• Expertise in industry-standard sign-off tools such as PrimeTime or Tempus (Tempus preferred)
• Deep understanding of Multi-Mode Multi-Corner (MMMC) challenges and Hierarchical vs. Flat timing closure
• Proficiency in SDC/CDC constraints
• B.Tech/M.Tech in Electrical/Electronics Engineering or a related field
• Proven ability to debug complex timing violations like data-to-clock skew and crosstalk

About the Company

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing, utilizing next-generation in-memory computing technology to provide high compute efficiency and density.