Staff Verification Engineer

Responsibilities

• Architect and lead verification strategies for complex digital and mixed-signal designs
• Design and implement sophisticated UVM-based verification environments to ensure comprehensive test coverage
• Provide technical mentorship to junior engineers and serve as a resource for the broader team
• Coordinate with design teams to establish verification requirements and sign-off criteria
• Lead complex debugging efforts across RTL and gate-level simulations
• Drive functional and code coverage closure using advanced verification methodologies
• Lead post-silicon validation activities to address critical hardware issues
• Serve as a principal technical contact for key customers and industry partners

Requirements

• Expert-level knowledge of SystemVerilog and Universal Verification Methodology (UVM)
• Deep understanding of mixed-signal design principles and verification methodologies
• Extensive experience with Cadence or Synopsys EDA tools and formal verification techniques
• Advanced proficiency in scripting languages such as Python, Perl, TCL, or Shell
• Proven ability to develop comprehensive verification plans and drive coverage-driven methodologies
• Demonstrated experience in technical leadership and mentoring junior engineers

Preferred Qualifications

• MS or PhD in Electrical Engineering, Computer Engineering, or a related field
• 7-10+ years of relevant digital design verification experience, specifically in mixed-signal environments

About the Company

Analog Devices, Inc. (ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. We combine analog, digital, AI, and software technologies into solutions that combat climate change, connect humans and the world, and drive advancements in automation, robotics, healthcare, and energy.