Staff SOC Physical Design Engineer

Responsibilities

• Lead and execute the physical design flow for high-speed SoC products, including DDR and graphics.
• Perform complex responsibilities such as floor planning, clock tree synthesis (CTS), place and route (P&R), and PDN.
• Drive timing analysis and closure to ensure high-performance targets are met.
• Execute physical verification checks at both chip and block levels, including LVS, DRC, and design-for-manufacturing/yield.
• Provide schedules and support cross-functional engineering efforts to drive signoff closure for tapeout.
• Contribute to design reviews and project meetings, implementing effective development plans.

Requirements

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 3 years of relevant experience.
• OR a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 7 years of progressive experience.
• Proven expertise in Floor Planning, Clock Tree Synthesis, and Place and Route.
• Strong experience in timing analysis and closure.
• Proficiency in physical verification flows (LVS, DRC).

About the Company

Qualcomm is a global leader in wireless technology, developing breakthrough innovations that impact lives around the world. We foster a supportive, inclusive culture where the brightest minds work together to solve the most complex challenges in semiconductor and wireless engineering.