Staff Silicon Design Engineer

Responsibilities

• Technically lead a small team of engineers responsible for NBIO performance across various projects
• Collaborate with performance architects, design, and verification engineers to define and verify new performance features
• Create detailed test plan documentation based on hardware designer and architect use cases
• Drive regression triage meetings and manage daily scrum, backlogs, and planning
• Develop new ideas to improve engineering infrastructure, methodology, and execution
• Provide technical support to debug both functional and performance test failures to identify root causes
• Work with RTL designers and SoC/IP Architects to resolve hardware and configuration-related performance issues
• Analyze performance results with SoC/Chip leads and suggest potential design solutions
• Conduct performance case studies and write detailed reports for management readouts

Requirements

• 7+ years of ASIC design verification experience
• Strong knowledge of RTL design, verification, and Architecture
• Hands-on experience developing or enhancing UVM testbenches with proficiency in UVM and SystemVerilog
• Solid understanding of IP-level ASIC design and verification flows from planning to tape-out
• Experience with C/C++ and scripting languages such as Python, Perl, or TCL
• Experience with scrum planning and execution
• Strong analytical and problem-solving skills

About the Company

AMD is on a mission to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming, and embedded systems. Grounded in a culture of innovation and collaboration, we push the limits of technology to solve the world’s most important challenges.