Staff Package Design Engineer

Responsibilities

• Execute package layout design and development for advanced packages, including 2.5D/3D IC, FCBGA, SiP, WLCSP, and multi-chip modules.
• Develop and maintain package CAD databases, ensuring strict adherence to design guidelines, DFM (Design for Manufacturing), and DFA (Design for Assembly).
• Manage the complete design cycle from schematic creation and netlist import to generating manufacturing outputs such as Gerbers and fabrication drawings.
• Create and modify substrate/RDL layouts, bump maps, escape routing, and power/ground structures.
• Collaborate with SI/PI, thermal, reliability, and DFT teams to support co-optimization and participate in design reviews.
• Ensure all designs comply with foundry, OSAT, and manufacturing design rules (DRC, LVS).
• Support Engineering Change Orders (ECO) cycles and version control throughout the project lifecycle.

Requirements

• 4+ years of hands-on experience in Package CAD layout and development.
• Strong background in 2.5D / 3D IC packaging, FCBGA, and multi-die/chiplet-based designs.
• High proficiency in industry-standard tools such as Cadence Allegro Package Designer (APD / SiP) or Siemens Xpedition / Substrate Integrator.
• Proven experience working with advanced manufacturing design rules and interfacing with Tier-1 OSATs and foundries.
• Solid understanding of Signal Integrity (SI) and Power Integrity (PI) fundamentals, including high-speed routing and impedance control.
• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, Materials Science, or a related technical discipline.

About the Company

Renesas is a global leader in microcontrollers, analog, power, and SoC products, delivering semiconductor solutions that power billions of connected, intelligent devices. We are leading the charge in advanced packaging to support the shift toward heterogeneous integration for automotive, industrial, and AI-forward computing platforms.