Staff Memory CAD Engineer

Responsibilities

• Develop and improve physical verification tools, rule decks, and methodologies for CMOS design, including DRC, LVS, DFM, and PERC
• Debug, evaluate, and support in-house and commercial EDA verification solutions in a production environment
• Develop and maintain rule decks and guide design teams on physical verification requirements and best practices
• Collaborate with design, layout, modeling, and process teams to solve verification and workflow challenges
• Evaluate EDA industry tools to identify opportunities for improved quality, performance, and efficiency
• Document processes and provide training and support for end users

Requirements

• Bachelor’s degree in Computer Engineering, Computer Science, or a related field
• 2+ years of experience in CAD, VLSI, or a related semiconductor engineering role
• Experience programming in SVRF/TVF (Calibre), Python, and/or Perl
• Experience with physical verification rule deck development and familiarity with Calibre EDA tools and flows
• Experience working in Linux/Unix environments, shell scripting, databases, and version control
• Effective communication skills in a collaborative engineering environment

Preferred Qualifications

• Understanding of CMOS process fundamentals and layout design rules
• Experience developing and debugging DRC/LVS rule decks, including antenna, ESD, LUP, and reliability checks
• Experience with parasitic extraction flows and methodologies
• Good understanding of physical verification methodologies, flows, and quality metrics

Benefits

• Choice of medical, dental, and vision plans
• Income protection programs for illness or injury
• Paid family leave
• Robust paid time-off program and paid holidays

About the Company

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.