Staff Layout Engineer

Responsibilities

• Create layout designs for critical circuits, ensuring compliance with process rules and schematic intent
• Perform verification tasks including LVS (Layout vs. Schematic), DRC (Design Rule Check), and quality checks
• Develop automation scripts using SKILL or Python to improve layout methodologies and productivity
• Coordinate with global partners to meet predictable schedules and support tapeout/mask generation processes
• Lead layout planning for assigned blocks and mentor team members on layout techniques and verification protocols

Requirements

• Bachelor’s Degree in Electrical/Computer Engineering or equivalent experience
• Proficiency with Cadence Virtuoso VXL and Calibre for DRC/LVS/Verifications
• Experience with semiconductor custom, memory, or analog layout
• Solid understanding of CMOS processes, design rules, and layout-dependent effects

Preferred Qualifications

• 3+ years of semiconductor custom/memory/analog layout experience with project leadership
• Background in DRAM, LPDDR, or HBM memory product layout
• Experience with scripting (SKILL, Python) to build automation and methodology
• Strong collaboration skills across global, multi-functional teams

Benefits

• Choice of medical, dental, and vision plans
• Income protection programs for illness or injury
• Paid family leave
• Robust paid time-off program and paid holidays

About the Company

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.