Staff HBM Design Architect - DFT

Responsibilities

• Define and implement end-to-end DFT architectures for HBM base die and DRAM die
• Develop DFT strategies for stacked-die, cube-level, and system-level test flows
• Architect test access mechanisms supporting wafer probe through final test
• Enable silicon observability for yield learning, debug, and failure analysis
• Collaborate across design, verification, layout, test, and manufacturing teams

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
• Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts
• Experience with wafer probe and final test semiconductor flows
• 5+ years of experience in DRAM or ASIC DFT design or verification

Preferred Qualifications

• Experience with HBM, DRAM, or advanced memory products
• Knowledge of TSV-based 3D integration and stacked-die test challenges
• Hands-on experience with at-speed test or advanced DFT techniques
• Exposure to DFT security features or custom customer test interfaces

Benefits

• Choice of medical, dental, and vision plans
• Income protection programs for illness or injury
• Paid family leave
• Robust paid time-off program and paid holidays

About the Company

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. Our HBM design organization builds the test architectures that enable the most advanced memory products in the world, working at the intersection of design, manufacturing, and silicon learning.