Staff Engineer, Serdes Analog Design

Responsibilities

• Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies
• Translate component design specification to schematics
• Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability
• Supervise layout designers to generate LVS/DRC clean layout
• Optimize layout to improve the power consumption and performance of circuits
• Perform functionality and performance validation in Silicon

Requirements

• Bachelors with 10+ years, Masters with 8+ years or PhDs with 5+ years of experience
• Minimum 2+ years experience in RF/Analog/Serdes SoC design
• Knowledge of analog and mixed-signal circuits (bandgap, LDO, filters)
• Experience with Serdes IP circuits (CTLE, DFE, FFE, clock distributions, PI, IQ generation)
• Knowledge of Serdes architecture and high-speed interconnect standards (USB, PCIe, UCIe)
• Proficiency with EDA tools such as Cadence, Spectre, Totem, and EMX
• Proficiency with scripting languages like Python or Matlab

Preferred Qualifications

• Experience with ESD, PLL, clock generation, ADC, and DAC

About the Company

Samsung Semiconductor Inc. (SSI) is a global leader in Memory, System, LSI and LCD technologies, contributing to breakthroughs in 5G, SOC, memory and display.