Staff Engineer, R&D Engineering at Synopsys - ScoutJobs - The AI-curated global job board
Skip to content
Synopsys
Posted a day ago

Staff Engineer, R&D Engineering

SynopsysStaff Engineer

Requirements

Bachelor's or Master's in Electronics or Electrical Engineering, 5+ years experience or Master's with 3 years experience, RTL design and SoC/ASIC integration, Verilog and SystemVerilog proficiency, SpyGlass, Fusion Compiler, or Encounter experience, SDC writing and debugging, AI tool usage (GitHub Copilot)

Skills

VerilogSystemVerilogRTLASICSOCPython

About the role

Responsibilities

  • Design and develop RTL using Verilog and SystemVerilog for complex SoC and ASIC components for production silicon
  • Integrate IP blocks at the SoC level, building the glue logic and subsystem architecture
  • Write SDC for synthesis to ensure constraints reflect real timing intent
  • Run and debug lint, CDC, and synthesis checks using tools like SpyGlass, Fusion Compiler, or Encounter
  • Collaborate with verification, physical design, and architecture teams to close functional and structural issues
  • Contribute to microarchitecture discussions to meet performance, power, and area targets
  • Mentor junior engineers on RTL quality, coding standards, and front-end design best practices

Requirements

  • Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or a related field
  • Minimum of 5 years of related experience, or a Master's degree with 3 years of relevant experience
  • Hands-on experience in RTL design and SoC or ASIC integration
  • Strong proficiency in Verilog and SystemVerilog
  • Experience with lint tools (SpyGlass, Leda), CDC analysis, and synthesis flows (Fusion Compiler, Encounter)
  • Ability to write SDC and debug synthesis issues in complex, multi-clock designs
  • Proficiency in using AI tools such as GitHub Copilot

Preferred Qualifications

  • Experience with high-speed interfaces like PCIe, USB, AXI, I2C, or JTAG
  • Familiarity with low-power design techniques
  • Scripting skills in Python, Tcl, or Perl

Benefits

  • Comprehensive medical and healthcare plans
  • Paid time away including ETO and FTO programs
  • Family support including maternity/paternity leave and adoption assistance
  • Employee Stock Purchase Plan (ESPP) with a 15% discount
  • Competitive salaries and retirement plans

About the Company

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation, and analysis solutions to power innovation across a wide range of industries.

ScoutJobs Agent

Get matches like this delivered daily

Sign up free — we'll pull jobs that fit your CV from across the web and rank them for you.

Get started — it's free

Staff Engineer, R&D Engineering

Synopsys · Bhubaneswar

Sign up to apply