Staff Engineer, Memory Systems Architecture

Responsibilities

• Recommend solutions to mitigate field DRAM failure rates based on SOC controller and memory operation knowledge
• Communicate ECC schemes to customers based on DRAM failure modes
• Interface with customers to establish value for in-field fault management architecture
• Contribute to DRAM/HBM failure logging standardization in the OCP
• Propose and develop platform RAS algorithms such as page offlining and hPPR
• Conduct POC with known failure DIMMs in real server and application environments

Requirements

• Bachelor's degree with 10+ years of relevant industry experience, Master's with 8+ years, or PhD with 5+ years
• Experience in hardware fault management, reliability, or data center fleet management
• Knowledge of platform memory subsystem and RAS (ECC, page offlining, hPPR, hardware sparing)
• Experience in ECC design, verification, and reverse engineering
• Understanding of CPU to memory address mapping
• Experience with memory controller register modification
• Linux kernel commit experience
• Understanding of DRAM and HBM failure modes

About the Company

Samsung Semiconductor provides technology solutions that power smartphones, electric vehicles, hyperscale data centers, and IoT devices. We are a global leader dedicated to pushing the boundaries of innovation through an inclusive and diverse workforce.