Staff Engineer - DFT

Responsibilities

• Plan, design, optimize, verify, and test electronic systems to launch cutting-edge products
• Apply in-depth knowledge of DFT concepts to ASIC design
• Perform scan insertion, ATPG, coverage analysis, and transition delay test coverage analysis
• Define test mode timing constraints and provide corrective actions for timing violations
• Simulate test vectors and perform equivalence checks
• Utilize DFT DRC rules within RTL lint tools and ATPG tools

Requirements

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field
• 4+ years of Hardware Engineering experience (or Master's with 3+ years, or PhD with 2+ years)
• Minimum of 3+ years of experience specifically in ASIC/DFT
• Expertise in scripting languages such as Perl or Shell
• Proficiency with ATPG tools (e.g., Tessent, TetraMax) and RTL lint tools (e.g., Spyglass)
• Strong problem-solving, communication, and teamwork skills

Preferred Qualifications

• Working experience with Genus, Synopsys TetraMax/DFTMax, or Cadence Encounter Test
• Ability to work effectively in a dynamic, international team environment
• Proven ability to multitask and manage several high-priority designs in parallel

About the Company

Qualcomm is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation for a smarter, connected future.