Staff Engineer - DEG Layout

Responsibilities

• Lead the layout design and development of critical analog, mixed-signal, custom digital blocks, standard cells, and full chip level components.
• Perform layout verification including LVS, DRC, Antenna, Shield, Matching, Latch-up, and EM IR Totem checks.
• Develop digital block layouts using auto placement and route tools.
• Manage project schedules through effective planning, area/time estimation, and delegation.
• Guide and review the work of developing team members on sub-block level layouts.
• Collaborate with global engineering teams to ensure successful project execution.
• Utilize AI tools to automate layout execution tasks and reduce overall effort.

Requirements

• 12 to 18 years of experience in analog/custom layout design using advanced CMOS processes.
• Expert proficiency in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
• Hands-on experience creating layouts for critical blocks such as Temperature sensors, PLL, ADC, DAC, LDO, Bandgap, and Charge Pumps.
• Deep understanding of analog layout fundamentals including Matching, Electro-migration, Latch-up, coupling, crosstalk, and IR-drop.
• Strong understanding of how layout effects impact circuit speed, capacitance, power, and area.
• Excellent problem-solving skills regarding physical verification of custom layouts.
• Strong verbal and written communication skills.

Preferred Qualifications

• Experience supporting multiple tape-outs.
• Basic understanding of skill coding and automation.

About the Company

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. We deliver a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products that fuel the data economy and enable advances in artificial intelligence and 5G applications.