Staff Engineer, Compiler

Responsibilities

• Adapt torch.compile to the backend by lowering Inductor's IR to hardware
• Build or extend kernel DSLs for hardware using tile-based or higher-level expression models
• Design placement and scheduling passes for distributed memory models
• Implement parallelism-aware lowering for tensor, pipeline, expert, and sequence parallelism
• Manage fusion, tiling, and memory planning for non-uniform memory hierarchies
• Contribute to open-source projects including PyTorch, Triton, Helion, and LLVM/MLIR

Requirements

• Bachelor's with 10+ years, Master's with 8+ years, or PhD with 5+ years of industry experience
• 3-5+ years of experience in Triton, Helion, MLIR, XLA, TVM, Inductor, IREE, or CUTLASS
• Experience designing kernel DSLs or IR from scratch
• Proficiency with MLIR dialects, passes, or backend integration
• Experience building PyTorch backends for non-CUDA accelerators
• Experience with kernel autotuning, performance modeling, or cost-based compilation
• Background in HPC, distributed systems, or NUMA-aware programming

Preferred Qualifications

• Open-source contributions to PyTorch, Triton, Helion, or LLVM/MLIR

About the Company

Samsung Semiconductor's AGI Computing Lab is dedicated to solving complex system-level challenges for future AI/ML workloads, designing scalable platforms that maximize performance while minimizing energy consumption.