Staff Engineer, ASIC Development Engineering

Responsibilities

• Develop and optimize Serdes PHY, analog, and mixed-signal IC layouts to ensure high performance and manufacturability.
• Collaborate with design engineers to translate design requirements into precise layouts.
• Independently debug DRC, ERC, LVS, EMIR, and PERC issues.
• Perform block-level PnR to ensure area, timing, and backend compatibility of custom blocks within the overall chip design.
• Identify and resolve layout-related issues and provide creative solutions to meet design specifications.
• Conduct layout reviews and provide technical feedback to improve methodologies.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field.
• 5-10 years of experience in IO/Analog mixed-signal IC layout design and block-level PnR.
• Proficiency in layout tools such as Cadence, Synopsys, or Mentor Graphics.
• Hands-on experience with custom layout for circuits including Bandgap references, LDOs, Clocking circuits, GPIOs, DDR IOs, and ESD circuits.
• Advanced knowledge of CMOS and FinFET technologies, specifically at 7nm and below.
• Strong understanding of signal integrity, parasitic effects, and reliability considerations like electromigration (EM) and IR drop.

Preferred Qualifications

• Knowledge of scripting languages such as Skill, TCL, Python, or SVRF for automation tasks.

About the Company

Sandisk relentlessly innovates to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions are the beating heart of the digital world.