Staff DDR & HBM Validation Engineer

Responsibilities

• Execute validation and bring-up activities for DDR and HBM memory subsystems
• Verify memory bring-up software, firmware and scripts against project requirements
• Debug firmware, hardware and system-level issues and contribute to root-cause analysis
• Analyze system logs, validation data and characterization results to identify failures
• Perform PHY characterization and analog-level analysis during stress testing
• Develop and execute functional, stress, performance and corner-case validation tests
• Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation
• Characterize memory bandwidth, latency, training behavior and subsystem stability
• Develop Python-based automation, test infrastructure and reporting tools
• Collaborate with architecture, RTL, firmware and platform teams to resolve technical issues
• Support silicon characterization, production readiness and qualification activities

Requirements

• Strong experience validating DDR, LPDDR, HBM or related DRAM technologies
• Deep understanding of DRAM architecture and memory controller functionality
• Experience with firmware, BIOS and Embedded C development
• Strong programming skills in C and Python
• Hands-on experience using laboratory equipment including oscilloscopes
• Experience interfacing with low-speed peripherals (GPIO, SPI, I2C, UART)
• Experience performing functional testing and signal measurements
• Strong knowledge of embedded systems and microcontroller-based platforms
• Hands-on experience with board bring-up and hardware validation
• Experience debugging complex hardware, firmware and system-level issues

Preferred Qualifications

• Experience with memory IP bring-up environments or validation software
• Knowledge of DDR/HBM PHY behavior and training algorithms
• Experience with memory margining, stress testing and reliability validation
• Familiarity with JTAG and low-level debug tools
• Experience with high-performance compute, AI accelerators or data center systems
• Understanding of signal and power integrity in high-speed memory systems

About the Company

The Memory Validation team is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products.