STA Engineer

Responsibilities

• Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs
• Conduct timing analysis, validation, and debug across multiple PVT conditions using PT/Tempus
• Run PrimeTime and/or Tempus for STA flow optimization and Spice to STA correlation
• Evaluate multiple timing methodologies and tools across different designs and technology nodes
• Develop automation scripts within STA/PD tools for methodology development
• Collaborate with cross-functional teams and provide technical writing and communication support

Requirements

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field
• 3+ years of Hardware Engineering or related work experience
• Proficiency in design automation using TCL, Perl, or Python
• Familiarity with digital flow design implementation from RTL to GDS (ICC, Innovus, PT/Tempus)
• Experience with process technology enablement, including circuit simulations using Hspice/FineSim and Monte Carlo

Preferred Qualifications

• 5 - 10 years of experience specifically in STA/Timing
• Strong expertise in STA timing analysis basics, AOCV/POCV concepts, and CTS
• Experience defining and managing timing constraints, including Latch transparency, 0-cycle, and multi-cycle path handling
• Hands-on experience driving timing convergence at Chip-level and Hard-Macro level
• In-depth knowledge of cross-talk noise, Signal Integrity, and Layout Parasitic Extraction
• Knowledge of ASIC back-end design flows and tools such as ICC2 and Innovus

About the Company

Qualcomm is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation for a smarter, connected future.