Sr Technologist, ASIC Development Engineering

Responsibilities

• Lead the planning, architecture, and execution of end-to-end verification strategies for complex SoC ASICs
• Develop and maintain robust UVM/SystemVerilog-based verification environments and reusable libraries
• Create detailed test plans and execute functional and code coverage goals to ensure design closure
• Write, run, and debug C-based tests on SoCs, requiring strong processor and embedded software knowledge
• Perform gate-level simulations with SDF annotation and support low-power verification using UPF
• Automate regression setup, execution, and analysis using Python, Perl, or TCL scripting
• Mentor junior and mid-level engineers through code reviews and test plan assessments
• Collaborate with architects, RTL designers, and post-silicon teams to ensure seamless verification coverage

Requirements

• BE or MS in Electrical Engineering or Computer Engineering
• 15+ years of professional experience in ASIC/SoC verification
• Deep expertise in SystemVerilog, UVM, and coverage-driven verification methodologies
• Proficiency in C programming and embedded software debugging
• Strong knowledge of bus protocols such as AXI, AHB, and APB
• Experience with gate-level simulations and power-aware (UPF/CPF) verification
• Proficiency in scripting languages including Python, Perl, TCL, or Bash
• Proven ability to develop and execute verification plans at the IP, subsystem, and SoC levels

About the Company

Sandisk relentlessly innovates to deliver advanced memory technologies and data storage solutions. As a leader in Flash and semiconductor components, Sandisk provides the essential hardware that powers the digital world, from mobile devices to cloud infrastructure.