Sr Synthesis and Front-End Implementation Engineer at NXP Semiconductors - ScoutJobs - The AI-curated global job board
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NXP Semiconductors
Posted 21 days ago

Sr Synthesis and Front-End Implementation Engineer

NXP SemiconductorsSr Synthesis and Front-End Implementation Engineer

Requirements

Bachelor's or Master's degree in VLSI or Electronics Engineering, 5+ years experience in digital ASIC/SoC design, Proficiency in Synopsys DC/FC or Cadence Genus, Strong understanding of STA and tools like PrimeTime or Tempus, Experience with formal verification tools (LEC), Knowledge of Verilog/SystemVerilog, Familiarity with Tcl, Python, or Perl

Skills

VerilogPythonTCLASIC

About the role

Responsibilities

  • Perform logical and physical synthesis of RTL designs for digital blocks and sub-systems using hierarchical methodologies
  • Develop and implement robust timing constraints (SDC) to achieve target frequencies and optimize performance
  • Conduct Static Timing Analysis (STA), identify critical paths, and collaborate with design teams for timing closure
  • Execute formal verification (LEC) to ensure functional equivalency between RTL and synthesized netlists
  • Analyze and optimize power consumption and area estimation to meet aggressive PPA requirements
  • Collaborate with RTL designers, DFT engineers, and physical design engineers for seamless integration
  • Develop and maintain automation scripts using Tcl, Python, or Perl for synthesis flows and design analysis
  • Evaluate and integrate new CAD tools and methodologies to improve design quality and efficiency

Requirements

  • Bachelor's or Master's degree in VLSI, Electronics Engineering, or a related field
  • 5+ years of experience in digital ASIC/SoC design with a focus on synthesis and front-end implementation
  • Proficiency with industry-standard synthesis tools such as Synopsys DC/FC or Cadence Genus
  • Strong understanding of STA concepts and tools like Synopsys PrimeTime or Cadence Tempus
  • Experience with formal verification tools such as Synopsys Formality or Cadence Conformal (LEC)
  • Solid knowledge of Verilog/SystemVerilog for digital design
  • Familiarity with scripting languages including Tcl, Python, or Perl

Preferred Qualifications

  • Experience with physical synthesis and floorplanning aspects
  • Understanding of UPF, low-power design techniques, and power analysis concepts
  • Knowledge of Design for Testability (DFT) principles

About the Company

NXP Semiconductors enables a smarter, safer, and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP pushes boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.

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Sr Synthesis and Front-End Implementation Engineer

NXP Semiconductors · Hyderabad

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