Sr. Staff/Staff Design Verification Engineer

Responsibilities

• Work with architects, designers, post-silicon, and software engineers to ensure high-quality designs for first silicon
• Develop and implement verification strategies, detailed tests, and coverage plans based on micro-architecture
• Create verification methodologies and reusable environments, including stimulus, checkers, assertions, and coverage
• Implement tests, manage regressions, gather coverage, and debug test failures
• Collaborate with cross-functional teams including RTL design, physical design, firmware, and validation
• Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases
• Continuously enhance verification infrastructure and flows to improve efficiency and quality
• Contribute to the evolution of overall verification methodology and best practices across the organization

Requirements

• 10+ years of Design Verification experience
• Deep knowledge of SystemVerilog testbench, DPI, and UVM
• Excellent programming skills and knowledge of software engineering practices, including object-oriented design
• Experience developing scalable and portable testbenches and components
• Experience with verification tools such as simulators, waveform viewers, and coverage collection
• Proficient in scripting languages such as Python or Perl
• Strong debugging and problem-solving skills

Preferred Qualifications

• Knowledge of pipelined processor architecture
• BS or MS in Computer Science or Electrical Engineering

About the Company

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, empowering machine learning users to effortlessly run large-scale ML applications. Our technology is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via ultra high-speed inference.