
Posted 3 days ago
Sr Engineer - Physical Design & Signoff (Synthesis to GDS2)
SynopsysSr Engineer - Physical Design & Signoff (Synthesis to GDS2)
Requirements
BS/B.Tech or MS/M.Tech in Electrical Engineering, 3+ years industry experience, Physical Design expertise, Physical Verification expertise, STA expertise, EMIR/Power signoff, SDC development, UPF/Multivoltage design, DRC/LVS/DFM cleaning, EDA tool proficiency, Advanced nodes experience, TCL/PERL scripting
Skills
ASIC
About the role
Responsibilities
- Conceptualize, design, and productize state-of-the-art RTL to GDS implementation for SLM monitors using ASIC design flows.
- Design on-chip Process, Voltage, Temperature, glitch, and Droop monitors for silicon biometrics and reliability.
- Execute digital backend activities including synthesis, pre-layout STA, SDC constraints development, floor planning, power planning, and routing.
- Drive post-layout STA, timing and functional ECO development, and timing signoff methodology for high-frequency IP design closure.
- Perform physical verification tasks such as DRC, LVS, PERC, ERC, Antenna, EMIR, and Power signoff.
- Collaborate with architects and circuit design engineering teams to refine new flows and methodologies.
Requirements
- BS/B.Tech or MS/M.Tech in Electrical Engineering with 3+ years of relevant industry experience.
- Strong hands-on experience in Physical Design, Physical Verification, pre- & post-layout STA, and EMIR/Power signoff.
- Expertise in SDC development, UPF/Multivoltage design, and mandatory experience with DRC, LVS, and DFM cleaning.
- Proficiency in digital design EDA tools (preferably Synopsys tools like FC, VCLP, PT, ICV, or Redhawk).
- Experience with advanced process nodes (14nm down to 2nm) and successful tape-outs.
- Proficiency in scripting using TCL or PERL for custom methodologies and flow enhancements.
Benefits
- Comprehensive medical and healthcare plans.
- Paid time away through ETO and FTO programs.
- Family support including maternity/paternity leave and adoption assistance.
- Employee Stock Purchase Plan (ESPP) with a 15% discount.
- Competitive salaries and regional retirement plans.
About the Company
Synopsys is a global leader in Electronic Design Automation (EDA), driving innovations in chip design, verification, and IP integration. Our technology is central to the Era of Pervasive Intelligence, empowering the creation of high-performance silicon chips that shape the future of semiconductors.
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Get started — it's freeSr Engineer - Physical Design & Signoff (Synthesis to GDS2)
Synopsys · Bengaluru
