SOC Engineering, Sr Staff Engineer

Responsibilities

• Own and execute block-level STA signoff and contribute to full-chip timing closure for advanced process nodes
• Perform STA debugging and closure for setup/hold, recovery/removal, clock gating, and CDC-related timing assumptions
• Develop, validate, and maintain timing constraints (SDC) including clocks, exceptions, and IO constraints
• Run and analyze power signoff flows using PrimePower or PT-PX and correlate timing/power impacts of ECOs
• Support timing and power ECO generation and validate fixes through signoff checks and regressions
• Work with synthesis and implementation teams to ensure tool correlation and correct interpretation of physical effects
• Build and maintain automation in TCL, Python, or Perl to improve STA productivity and regression quality
• Contribute to improving STA methodologies, checklists, and best practices

Requirements

• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, or a related field
• 8+ years of relevant experience in STA and timing closure
• Strong hands-on experience with constraints development and validation (SDC)
• Expertise in STA signoff across modes and corners, including MMMC concepts
• Proficiency with Synopsys PrimeTime (required)
• Strong scripting skills in TCL (required)
• Experience with advanced process nodes (16nm to 5nm)

Preferred Qualifications

• Experience with PrimePower, PT-PX, PrimeClosure, or Tweaker
• Working knowledge of Fusion Compiler, ICC2, or Design Compiler
• Exposure to parasitic extraction concepts (e.g., StarRC)
• Proficiency in Python or Perl scripting
• Understanding of low-power design considerations and UPF awareness

Benefits

• Comprehensive medical and healthcare plans
• Paid time off including ETO and FTO programs
• Maternity and paternity leave and family support resources
• Employee Stock Purchase Plan (ESPP) with a 15% discount
• Competitive salaries and regional retirement plans

About the Company

Synopsys is a leader in chip design, verification, and IP integration. We drive the innovations that shape the way we live and connect, providing the technology central to the Era of Pervasive Intelligence.