Silicon Validation Engineer (NPU SoC)

Responsibilities

• Lead NPU 1st Silicon Bring-up including NPU accelerator cores, CPU Subsystem, NoC, and Memory Subsystem (LPDDR/HBM)
• Establish and execute systematic validation methodologies for Pre-silicon (Emulator, FPGA) and Post-silicon environments
• Develop Test Firmware (Bare-metal) and scenarios for IP verification
• Perform system-level issue debugging at the HW/SW boundary using JTAG and Trace32
• Support performance validation and optimization of NPU data pipelines and memory bandwidth
• Build test automation environments using scripts and CI/CD integration

Requirements

• Experience in SoC, ASIC, or complex Silicon/System Validation
• Deep understanding of ARM Architecture, AMBA BUS (AXI, AHB), and SoC/Computer Architecture
• Proficiency in Embedded C/C++ and Rust for hardware control and bare-metal development
• Experience with systematic validation methodologies including Test Plan, Bug Tracking, and Coverage
• Expertise in JTAG debugging (Trace32) and HW/SW co-debugging

Preferred Qualifications

• Experience with AI accelerators (NPU, TPU), GPUs, or complex multi-core SoC bring-up
• Experience in Pre-silicon environments (Palladium, Zebu, FPGA)
• Understanding of High-Speed Interface protocols (Ethernet, CXL, LPDDR, HBM)
• Knowledge of Linux Kernel and Device Driver operations
• Experience using Rust for system-level software development
• Experience building automation environments with Python, Tcl, or Bash