Signal/Power Integrity Engineer

Responsibilities

• Define SI/PI requirements based on IP and system-level specifications
• Perform SI/PI simulations at electromagnetic (EM), circuit, and system levels
• Develop SI/PI methodologies for advanced packaging technologies such as chiplet, 3D-IC, D2D, and C2C interfaces
• Cover SI/PI analysis and optimization at the full system level, including on-chip, package, and PCB domains
• Provide design guidance on stack-up, interconnect routing, PDN architecture, decoupling strategy, and component selection
• Collaborate with silicon, package, and board teams to ensure accurate measurement-simulation correlation
• Support debug and bring-up efforts in the lab
• Work with internal teams and partners to co-optimize SI/PI solutions

Requirements

• BS or MS in Electrical Engineering, Physics, or a related field
• 8+ years of experience in component- and system-level SI/PI analysis
• Solid understanding of SI/PI fundamentals and methodologies
• Hands-on experience with lab instruments such as VNA, TDR, and real-time oscilloscopes
• Proficient in EDA tools such as SIwave, HFSS, ADS, HSPICE, Allegro, RedHawk-SC, SC-ET, or RedHawk-3DIC

Preferred Qualifications

• PhD in Electrical Engineering, Physics, or a related field with 5+ years of industry experience
• Experience with high-speed digital systems and standard interfaces (PCIe, DDR, Ethernet)
• Modeling and analysis of complex 3D structures using EM simulation tools
• On-chip Backend sign-off (Static/Dynamic IR, EM)
• On-/Off-chip PDN modeling and budgeting
• On-chip glitch/jitter/DVD analysis and sign-off methodology
• Experience with on-chip clock sign-off and 3DIC jitter derating