Senior Verification Engineer

About the Company

Fractile is building the silicon, systems, and software to break through the memory wall, the fundamental hardware constraint standing between today's AI and what comes next. Founded in 2022, we are a fast-growing team of 100+ people located in London and Bristol, at the heart of the UK's frontier AI ecosystem.

Responsibilities

• Take an active role in building world-class ML/AI IC products for data centre applications
• Perform pre-silicon RTL verification
• Collaborate with modelling, system architecture, and RTL design teams
• Contribute to discussions around specification, architecture, and workflows
• Ensure RTL releases meet the highest functional quality standards
• Improve established verification practices and workflows

Requirements

• 6+ years of experience in hardware or verification roles
• Strong software skills in Python or C++
• Understanding of digital hardware concepts
• Ability to read and debug RTL in SystemVerilog
• Familiarity with debugging waveforms

Preferred Qualifications

• Experience in pre-silicon RTL verification (planning, execution, testbench building, stimulus creation)
• Experience with functional modelling, checker creation, and coverage closure
• Proficiency in Transaction-Level Modelling (UVM, SystemC, etc.)
• Knowledge of SystemVerilog Assertions (SVA)
• Experience with open source silicon tools like Cocotb, Verilator, or Icarus Verilog
• Experience with commercial EDA tools or formal verification
• Familiarity with monorepo environments or Bazel