Senior Technical Staff Engineer - Verification

Responsibilities

• Architect, develop, and maintain UVM and Formal verification environments
• Define verification plans and implement constrained-random UVM and/or Formal testbenches
• Develop assertions and coverage in SystemVerilog, analyze metrics, and drive coverage closure
• Debug RTL and testbench issues, performing root cause analysis in collaboration with design teams
• Integrate IP-level testbenches into SoC-level verification environments
• Collaborate with architects and designers to verify IP and product requirements
• Provide technical support and mentoring to verification engineers
• Improve verification methodologies by leveraging AI/ML automation to reduce cycle time

Requirements

• Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering
• Minimum 15 years of experience in functional verification
• Strong expertise in SystemVerilog, assertions, and UVM methodology
• Proven experience building IP-level and SoC-level verification environments
• Excellent understanding of digital design, RTL fundamentals, and ARM/RISC architectures
• Strong communication, teamwork, and problem-solving skills

Preferred Qualifications

• Demonstrated success in mentoring engineers and leading global verification efforts
• Experience driving methodology improvements and automation initiatives

About the Company

Microchip Technology Inc. is a leading semiconductor company that designs technology that powers the world. With a team of over 17,000 members, we foster a culture of trust, empowerment, and innovation. We are committed to employee development and values-based decision making, helping our people grow alongside our multi-billion dollar global organization.