Posted 3 days ago
Senior Staff RTL Design Engineer
SynopsysSenior Staff RTL Design Engineer
Requirements
Bachelor's in Electrical Engineering with 8+ years experience, Master's with 6+ years experience, Deep RTL design experience on IP cores or SoC subsystems, Knowledge of AMBA, PCIe, USB, or MIPI protocols, Proficiency in Verilog or SystemVerilog, Experience with synthesis, STA, lint, and CDC
Skills
RTLVerilogSystemVerilogEthernetASIC
About the role
Responsibilities
- Design and code RTL for high-speed Ethernet IP cores ranging from 100G to 1.6T, focusing on low latency and timing closure.
- Translate protocol specifications into micro-architecture and detailed design documents for DesignWare IP.
- Build and refine directed Verilog testbenches to improve functional and code coverage.
- Perform technical reviews of functional specs, micro-architecture documents, and RTL code.
- Drive timing analysis and closure using synthesis, STA, lint, CDC, and formal verification flows.
- Collaborate with global verification and product teams to deliver production-quality IP on schedule.
Requirements
- Bachelor's in Electrical Engineering with 8+ years of hands-on ASIC or IP design experience, or a Master's with 6+ years.
- Deep RTL design experience on IP cores or SoC subsystems that have taped out or shipped to customers.
- Strong working knowledge of protocols such as AMBA (AHB, AXI, CHI), PCIe, USB, or MIPI.
- Proficiency in Verilog or SystemVerilog.
- Hands-on experience with synthesis flows, static timing analysis (STA), lint, CDC, and formal verification tools.
- Experience with version control systems like Perforce and scripting in Perl or shell for automation.
Preferred Qualifications
- Experience with high-speed Ethernet (100G and above).
- Experience with datapath designs or arithmetic algorithms like FEC.
- Familiarity with low power design methodologies and automotive safety requirements.
Benefits
- Comprehensive medical and healthcare plans.
- Paid time away including ETO and FTO programs.
- Family support including maternity/paternity leave and adoption assistance.
- Employee Stock Purchase Plan (ESPP) with a 15% discount.
- Competitive salaries and regional retirement plans.
About the Company
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation, and analysis solutions to power innovation across various industries.
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Get started — it's freeSenior Staff RTL Design Engineer
Synopsys · Bengaluru
