Senior Lead Verification Engineer

Responsibilities

• Develop and enhance System Verilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects
• Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture
• Understand TestBench Architecture and develop expertise in TestBench Verification Components
• Mentor junior engineers

Requirements

• Bachelor’s or master’s degree in Electronics, Electrical, or Computer Engineering
• Proficient in IP or Sub-system level ASIC verification
• Strong experience with SystemVerilog and UVM
• Experience with scripting languages such as Perl, Ruby, or Make

Preferred Qualifications

• 15+ years of industry experience
• Experience architecting and developing complex verification environments and infrastructure
• Exposure to RTL design, software development, or formal verification
• Proven experience in UVM TestBench Development for complex designs

About the Company

AMD is on a mission to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. We push the limits of innovation to solve the world’s most important challenges through a culture of collaboration and excellence.