Senior Lead Engineer Digital Verification

Responsibilities

• Drive digital verification efforts and develop complex testbenches using System Verilog
• Implement OVM/UVM methodologies and System Verilog assertions
• Manage Low Power Simulation and UPF setup, including debugging simulation failures
• Mentor junior engineers and provide technical guidance
• Work independently or collaboratively within a team to meet project milestones

Requirements

• 4+ years of professional design verification experience
• BS or higher in EE, EC, or ECC Engineering
• Deep knowledge of computer architecture and design verification fundamentals
• Proficiency with Verilog and popular EDA simulation tools
• Experience with OVM/UVM methodologies and System Verilog assertions
• Experience in Low Power Simulation and UPF setup
• Proficiency in scripting languages such as Perl or Unix shell
• Excellent written and oral communication skills

Preferred Qualifications

• Exposure to wired or wireless technologies such as PCIe, USB, Ethernet, 5G, WiFi, MAC layer, or PHY/DSP layer
• Hands-on experience with WiFi 802.11 MAC layer protocols
• Experience with assembly language programming

About the Company

NXP Semiconductors enables a smarter, safer, and more sustainable world through innovation. As a global leader in secure connectivity solutions for embedded applications, NXP pushes boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.