Senior Lead Engineer Analog Validation

Responsibilities

• Oversee analog block-level validation for PMU (LDO, DCDC, GDET, FRO, OSC, References), CGU (PLL), ADC/DAC, and WBIAS.
• Manage system-level validation and key customer MCU use case validation.
• Drive ATE and bench correlation to ensure measurement accuracy.
• Develop robust test plans, coverage models, and sign-off criteria.
• Own validation readiness for tape-out, risk production, and mass production.
• Partner with Design, Architecture, Product Engineering, Firmware, and Manufacturing teams.
• Set clear goals, KPIs, and execution frameworks for validation programs.
• Standardize validation methodologies across different sites.

Requirements

• Extensive experience in analog block-level validation.
• Proven expertise in system-level validation.
• Strong background in ATE and bench correlation.
• Proficiency in test plan development and coverage models.
• Ability to ensure all instrumentation, scripting, and boards are prepared prior to silicon arrival.

About the Company

NXP Semiconductors enables a smarter, safer, and more sustainable world through innovation. As a global leader in secure connectivity solutions for embedded applications, NXP pushes boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.