Senior FPGA Engineer

Responsibilities

• Complete multiple FPGA or ASIC designs using Verilog and/or VHDL
• Develop test benches with self-checking and simulation, including back annotated timing
• Lead small sized teams to develop moderately complex systems according to program schedules
• Perform thorough design documentation, RTL block completion, and code reviews
• Conduct significant RTL debug and solve digital lab debug problems using scopes and logic analyzers

Requirements

• 10+ years of FPGA experience
• Extensive knowledge of digital circuit design, state machines, and Boolean math
• Proficiency in Verilog and/or VHDL
• Experience with FPGA process flows using Synplify Pro, ISE, Vivado, or Libero
• Experience with scripting languages such as TCL or Python
• US Citizenship required

Preferred Qualifications

• Knowledge of RTL design techniques for radiation upset mitigation
• Bachelor's degree in Electrical Engineering or Computer Science
• Experience with Xilinx and Actel/Microsemi technologies

Benefits

• Medical, dental, and vision insurance plans
• 401(k) retirement plan
• Year-end bonus eligibility
• Paid leave including vacation, sick, bereavement, and FMLA

About the Company

SEAKR Engineering is a leading-edge provider of advanced electronics for space applications, pushing the boundaries of technology to change the world from space.