Senior Engineer II, Verification

Responsibilities

• Define and develop verification environments and architecture
• Write comprehensive verification plans and technical documentation
• Generate test benches and automatic regression plans
• Manage block-level and chip-level verification for complex SoC platforms
• Perform simulations, verifications, and debugging of circuit and logic designs
• Debug RTL for design intent and collaborate with cross-functional teams

Requirements

• Minimum of 6 years of proven silicon design or verification experience
• Hands-on experience with OVM/UVM methodologies
• Proficiency in SystemVerilog, Verilog, and VHDL
• Strong knowledge of protocols such as AXI, AHB, Ethernet, or JESD
• Experience in coverage and assertion-driven verification
• Proficiency in UNIX shell, Perl, and TCL scripting
• Knowledge of CMOS logic design, circuit design, and circuit analysis
• Experience with CAE/CAD tools for schematic capture and simulation
• Excellent written and verbal communication skills in English

About the Company

Microchip Technology Inc. is a leading semiconductor company that designs technology that powers the world. With a global team of over 17,000 members, we foster a culture of trust, empowerment, and innovation. We are committed to employee development and values-based decision making, providing a stable and challenging environment for professionals to grow their careers.