Senior Engineer I - Physical Design

Responsibilities

• Implement complete physical design for multiple large and complex blocks and sub-system implementations from 40nm to 3nm technology nodes.
• Execute floor-planning, Place & Route (P&R), and Clock Tree Synthesis (CTS) using Innovus or ICC2.
• Manage physical verification, IP integration, and IR/EM checks.
• Take ownership of full chip and subsystem design and flow challenges.
• Use metric-driven techniques to ensure first-pass working silicon.
• Guide junior team members and communicate project status and technical issues to leads and implementation teams.

Requirements

• B.E/B.Tech/M.Tech in Electronics.
• 4+ years of Physical Design experience in a fast-paced environment.
• Expertise in Physical Design activities including Floor-planning, CTS, P&R, Extraction, Power IR/EM, Physical Verification (DRC/LVS), and Signal Integrity.
• Advanced knowledge of place and route methodologies and low power methodologies.
• Proficiency with backend tools such as Innovus or ICC2, Calibre or PVS, PrimeTime or Tempus, and Redhawk or Voltus.
• Strong understanding of Static Timing/Crosstalk Analysis, timing closure, and Synthesis/DFT concepts.
• Experience working with analog IP, hard/soft macros, and delivering hierarchical design projects.
• Strong programming skills in Perl, TCL, Shell, or Python.
• Excellent oral and written communication skills for global team collaboration.

About the Company

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio includes microcontrollers, microprocessors, FPGAs, and a broad spectrum of high-performance analog and mixed-signal devices. We are a global organization dedicated to empowering innovation and supporting employee growth through a culture of trust, respect, and diversity.