Senior Engineer I Design Implementation

Responsibilities

• Execute Synthesis, Formal equivalence, Low Power Checks, and Static Timing Analysis (STA) for 32-bit microcontroller product lines.
• Optimize PPA (Power, Performance, and Area) metrics during synthesis and perform design verification/signoff.
• Drive collateral generation, SoC timing budgeting, constraint analysis, and sign-off timing/power closure.
• Collaborate with architecture, design, verification, and physical design teams to support constraint and UPF development.
• Evaluate new tools and features to develop and maintain RTL-to-Netlist tool flows and methodologies.
• Participate in SoC development planning, scheduling, and interact with tool vendors to debug IP or tool-related issues.

Requirements

• BSEE minimum; MSEE preferred.
• 3 to 4 years of relevant experience in design implementation.
• Hands-on experience with STA, Synthesis, UPF, and Functional equivalence.
• Strong exposure to RTL2GDS flows for digital and mixed-signal designs.
• Proficiency in scripting languages such as TCL, Perl, or Python for design flow development.
• Strong documentation and presentation skills.
• Ability to collaborate effectively within cross-functional and cross-site team environments.

About the Company

Microchip Technology Inc. is a leading semiconductor company that provides solutions for various industries worldwide. With a team of over 17,000 members, we focus on empowering innovation to enhance the human experience. We pride ourselves on a culture of trust, empowerment, and diversity, supported by our nationally recognized Leadership Passage Programs.