Senior Emulation Engineer

Responsibilities

• Bring-up of next-generation NPUs on emulation platforms
• Root-cause complex system-level test failures and resolve emulator environment challenges
• Enable full-system NPU testing by integrating and bringing up high-speed protocol models (PCIe, Ethernet) and advanced memory subsystems (HBM/DDR) within the emulation environment

Requirements

• 8+ years of industry experience in hardware emulation or system-level verification
• Bachelors or Masters degree in Electrical Engineering, Computer Engineering, Computer Science, or a related engineering field
• Extensive experience developing, compiling, and deploying large-scale emulation models using Synopsys ZeBu or Cadence Palladium
• Deep technical understanding of AI accelerator architectures (NPU)
• Expertise in interconnect buses, high-speed I/O protocols (PCIe, Ethernet), and advanced memory interfaces (LPDDR, HBM)
• Ability to work independently in a cross-regional environment across Korea and US time zones

Preferred Qualifications

• Track record of writing production-grade, meticulous test plans
• Strong foundational knowledge of networking protocols