
Posted a day ago
Senior Digital Verification Engineer
NXPSenior Digital Verification Engineer
Requirements
BSc. or MSc. in Electronics or Electrical Engineering, SystemVerilog testbench development, UVM expertise, Constrained Random Verification, Metrics-Driven Verification, SystemVerilog Assertions (SVA), Coverage Closure, Debugging complex verification environments
Skills
SystemVerilogUVMSVA
About the role
Responsibilities
- Verify functional behavior of complex digital hardware architectures
- Create, review, and maintain verification plans and track progress
- Develop verification strategies, tests, and environments for security features and hardware co-processors
- Implement emerging verification methodologies into existing flows
- Mentor junior team members to drive technical excellence and consistency
Requirements
- BSc. or MSc. degree in Electronics or Electrical Engineering
- Strong hands-on experience with SystemVerilog for testbench development
- Proven expertise in UVM (Universal Verification Methodology)
- Solid understanding of Constrained Random Verification techniques
- Experience with Metrics-Driven Verification, including functional coverage and planning
- Ability to write SystemVerilog Assertions (SVA)
- Demonstrated success in achieving Coverage Closure
- Strong debugging skills within complex verification environments
Preferred Qualifications
- Knowledge of Formal Verification methods
About the Company
NXP is a global leader in secure connectivity solutions for embedded applications, driving innovation across the automotive, industrial & IoT, mobile, and communication infrastructure markets. Our Crypto & Security Competence Center focuses on high-end security IP and end-to-end security solutions.
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NXP · Glasgow
