Senior DFT Engineer

Responsibilities

• Define DFT specifications, architecture, and implementation using state-of-the-art methodologies and tools
• Drive DFT flow automation, methodology support, and continuous innovation
• Support all product lines to achieve high coverage, low power, and low test time
• Deliver high-quality, verified Automatic Test Pattern Generation (ATPG) patterns
• Perform pre-silicon and post-silicon verification and debug
• Work independently to solve complex problems and mentor junior team members

Requirements

• 6-8 years of direct experience in ASIC/SoC DFT
• Expert knowledge of DFT architecture and planning
• Hands-on proficiency with Tessent DFT tools
• Deep understanding of Scan, Test Compression, At-Speed Test, MBIST, and LBIST
• Experience with Scan Insertion, Compression Insertion, and On-Chip Clock Control Insertion
• Proficiency in ATPG and DFT Verification
• Experience with gate-level simulation using SDF
• Experience with silicon test bring-up, failure analysis, and debug/diagnosis
• Strong scripting skills in Perl, Python, or Tcl
• Excellent written and verbal communication skills

Preferred Qualifications

• Experience with Cadence and Synopsys DFT tools
• Knowledge of IEEE 1149 and JTAG standards
• Experience with Static Timing Analysis (STA)
• Experience with Synthesis and DFT Insertion
• Familiarity with Low Power Scan and UPF

About the Company

Analog Devices, Inc. (ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. We combine analog, digital, AI, and software technologies to solve complex challenges in automation, robotics, mobility, healthcare, and energy.