Senior DFT Design Engineer

Responsibilities

• Implementation and verification of DFT features like SCAN, MBIST, LBIST and JTAG
• Support Spyglass-DFTDRC debug and coverage correlation
• Scan insertion and ATPG pattern generation
• ATPG patterns verification with gate-level simulation
• Test coverage and test cost reduction analysis
• Post silicon support to ensure successful bring up and enhance yield learning

Requirements

• Bachelors degree with 7+ years or Masters degree with 5+ years in Electronics or Electrical Engineering
• Strong analytical and problem-solving skills
• Experience in digital design and DFT

Preferred Qualifications

• Experience in scan-stitching and related concepts
• Exposure to MBIST/BISR implementation and Tessent flow
• Hands-on ATPG experience and knowledge of required files
• Knowledge of Tessent ATPG (Mentor) and Spyglass-DFT
• Proficiency in scripting (TCL, AWK, SED)
• Understanding of JTAG basics
• Experience with post-silicon bring up

About the Company

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems.