Senior DFT Design Engineer

Responsibilities

• Define and implement DFT architectures and specifications for FPGA, processors, DSP, SERDES, IO, and multi-die designs
• Perform test logic insertion, ATPG pattern generation, and pre-silicon validation for manufacturability and quality
• Collaborate with IP and integration design teams to align DFT features with design functionality and timing
• Partner with test development teams to support silicon bring-up, debug, and production readiness
• Contribute to DFT methodology and automation flows to enhance scalability and efficiency
• Ensure manufacturability goals are met, including test coverage, test cost optimization, and yield improvement

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 7+ years of industry experience, OR a Master's degree with 5+ years of experience
• Experience in DFT design and verification at both RTL and gate level
• Proficiency with EDA tools including synthesis, scan insertion, ATPG, simulation, debug, and STA tools
• Strong design automation experience and proficiency in scripting languages such as Perl or TCL

Preferred Qualifications

• Experience with test compression, BIST (MBIST/LBIST), and advanced fault models
• Prior experience with 2.5D/3D multi-die designs and high-speed IO/SerDes DFT

About the Company

Altera provides leadership programmable solutions that are easy to use and deploy, across the cloud to the edge, enabling limitless possibilities for AI. Our broad portfolio includes FPGAs, SoCs, CPLDs, IP, development tools, system-on-modules, SmartNICs and IPUs, offering the flexibility to accelerate innovation.