Senior Designer, Layout

Responsibilities

• Create section-level to top-level layouts for Power Management ICs (PMIC)
• Collaborate closely with schematic designers, tech leaders, and other layout designers
• Influence design decisions from early definition through silicon evaluation
• Ensure layouts meet project schedules and achieve high-quality analog performance targets, including precise matching and minimized parasitics
• Provide critical insights and make key trade-off decisions to drive product success
• Lead block layout resources by allocating work and setting schedules when required
• Mentor new hires or interns and contribute to continuous improvement initiatives

Requirements

• BS in Electronics or Electrical Engineering
• At least 4 years of relevant working experience in IC layout
• Extensive section-level (multi-hierarchical) layout experience
• Strong fundamental knowledge of semiconductor device physics, cross-section, and construction
• Strong understanding of layout principles, IC reliability, and failure mechanisms
• Proficiency in Cadence Virtuoso XL and Calibre verification tools

Preferred Qualifications

• Experience with top-level or chip-level layout
• Layout experience with Voltage/Current Monitors, Voltage Refs, LDOs, or DC-DC Converters (Buck/Boost)
• Experience working with 0.18um or 90nm technology nodes
• Strong leadership and communication skills for collaborating with global cross-functional teams

About the Company

Analog Devices, Inc. (ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation, robotics, mobility, healthcare, energy, and data centers.