Senior Design Verification Engineer

Responsibilities

• Build an innovative design verification environment using GenAI and agentic tools to improve efficiency and quality
• Implement workflows that enable schedule left-shift and enhance execution efficiency
• Develop agentic MCP and skill-based tools to optimize verification processes
• Execute sophisticated verification methods using ASIC simulation tools

Requirements

• 5+ years of Design Verification experience using UVM System Verilog methodology
• Bachelor's degree in Electrical Engineering, Computer Science, or a related major
• Hands-on experience with GenAI, including the development of agentic tools
• Expertise with ASIC simulation tools and sophisticated verification methods
• Proficiency in System Verilog, System C, C++, and scripting languages
• Experience with SoC and CPU emulation verification environments
• Proven track record of developing test plans and achieving coverage closure

Preferred Qualifications

• Master’s degree in Electrical Engineering or Computer Science
• Demonstrated ability to achieve design verification quality signoff
• Strong interpersonal skills for collaborating with multi-functional, cross-geographical teams

Benefits

• Comprehensive medical, dental, and vision plans
• Income protection programs and paid family leave
• Robust paid time-off program and paid holidays
• Additional compensation opportunities including bonuses and equity

About the Company

Micron Technology is a world leader in innovating memory and storage solutions. We transform information into intelligence, inspiring the world to learn, communicate, and advance faster than ever before.