Senior Debug Validation Engineer

Responsibilities

• Lead post-silicon debug and validation activities for AI compute silicon and platform technologies
• Investigate and resolve complex silicon, firmware, software and system-level issues during bring-up and validation
• Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency
• Collaborate with architecture, RTL, firmware, software and systems engineering teams to identify root causes
• Drive debug of CPU, memory, interconnect and high-speed I/O subsystems under functional, stress and workload conditions
• Develop and enhance automated debug, regression and validation infrastructure using Python
• Analyse logs, traces, telemetry and hardware data to isolate and characterize system failures
• Support development of validation tests, debug tooling and custom diagnostics

Requirements

• Strong experience in bare metal environments
• Good knowledge of SoC and platform architectures
• Expertise in debug infrastructure and post-silicon debug methodologies
• Strong programming skills in Python, C, or debug scripting languages like CMM
• Experience of the post-silicon validation process in digital ASIC environments
• Strong Linux and Python experience
• Deep knowledge of scan, DFT, JTAG and trace infrastructure
• Strong debug skills including fault tree analysis and failure isolation

Preferred Qualifications

• Understanding of DFT flows from insertion through post-silicon validation
• Experience developing tooling for parsing and analysing debug data
• Driver-level experience with PCIe, Ethernet, LPDDR, DDR, HBM, I2C, I3C, or SPI
• Experience using CoreSight and similar debug infrastructure (Lauterbach, JLink, etc.)
• Knowledge of mixed-signal building blocks like PLLs and high-speed PHYs
• Experience with Arm CPU architectures and AMBA protocols
• Understanding of ML applications and associated workloads

About the Company

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute, developing hardware, software and systems infrastructure to power the next generation of AI breakthroughs.