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Posted a day ago
Senior DDR & Execution Validation Engineer
GraphcoreSenior DDR & Execution Validation Engineer
Requirements
Experience validating DDR, LPDDR, or HBM, Deep understanding of DRAM architecture, Experience with firmware, BIOS, and Embedded C, Proficiency in C and Python, Hands-on experience with oscilloscopes and lab equipment, Experience with board bring-up and hardware validation
Skills
PythonC#Embedded C
About the role
Responsibilities
- Execute validation and bring-up activities for DDR and HBM memory subsystems
- Verify memory bring-up software, firmware and scripts against project requirements
- Debug firmware, hardware and system-level issues and contribute to root-cause analysis
- Analyze system logs, validation data and characterization results to identify failures
- Perform PHY characterization and analog-level analysis during stress testing
- Develop and execute functional, stress, performance and corner-case validation tests
- Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation
- Develop Python-based automation, test infrastructure and reporting tools
- Collaborate with architecture, RTL, firmware and platform teams to resolve technical issues
Requirements
- Strong experience validating DDR, LPDDR, HBM or related DRAM technologies
- Deep understanding of DRAM architecture and memory controller functionality
- Experience with firmware, BIOS and Embedded C development
- Strong programming skills in C and Python
- Hands-on experience using laboratory equipment including oscilloscopes
- Experience interfacing with low-speed peripherals like GPIO, SPI, I2C and UART
- Experience performing functional testing and signal measurements
- Strong knowledge of embedded systems and microcontroller-based platforms
- Hands-on experience with board bring-up and hardware validation
- Experience debugging complex hardware, firmware and system-level issues
Preferred Qualifications
- Experience with memory IP bring-up environments or validation software
- Knowledge of DDR/HBM PHY behavior and training algorithms
- Experience with memory margining, stress testing and reliability validation
- Familiarity with JTAG and low-level debug tools
- Experience with high-performance compute, AI accelerators or data center systems
- Understanding of signal and power integrity in high-speed memory systems
- Experience developing validation automation frameworks
About the Company
The Memory Validation team is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products.
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Graphcore · Bengaluru
