Senior ASIC Physical Design Engineer at K2 Space - ScoutJobs - The AI-curated global job board
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Posted 20 hours ago

Senior ASIC Physical Design Engineer

K2 SpaceSenior ASIC Physical Design Engineer

Perks & benefits

Paid LeaveMedical Insurance

Requirements

Bachelor's or Master's in EE or CE, 5-10 years ASIC physical design experience, Synopsys ICC2 or Cadence Innovus experience, Knowledge of timing analysis and power optimization, Familiarity with FinFET technologies

Skills

ASICSOCPhysical Design

About the role

Responsibilities

  • Execute the complete physical design flow for complex SoC blocks and top-level integration, including synthesis, floorplanning, place & route, CTS, STA, and physical verification
  • Perform timing closure and optimization across multiple corners and modes using industry-standard tools
  • Collaborate with front-end, verification, and DFT teams to ensure clean handoff and predictable convergence
  • Work with external physical design service providers and internal leads to review deliverables and ensure schedule alignment
  • Develop and maintain scripts and automation to improve flow efficiency and consistency
  • Support physical sign-off activities including DRC/LVS, IR drop, EM, and power analysis
  • Assist in chip-level integration, ECOs, and tapeout preparation
  • Contribute to methodology development, tool evaluation, and flow documentation
  • Support product through production and spaceflight

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
  • 5–10 years of experience in ASIC physical design for complex SoCs
  • Hands-on experience with Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent
  • Strong understanding of timing analysis, power optimization, and physical verification flows
  • Experience with hierarchical or flat SoC design methodologies
  • Familiarity with FinFET technologies
  • Working knowledge of DFT, UPF/CPF power intent, and ECO implementation
  • Strong problem-solving skills and ability to work cross-functionally

Preferred Qualifications

  • Exposure to radiation-hardened or space-qualified ASICs
  • Experience with chip-package co-design or advanced packaging (2.5D/3D)
  • Familiarity with physical design service vendor management or offshore collaboration
  • Experience with sign-off through TSMC
  • Experience with Gate-All-Around technologies
  • Experience working in cross-functional, geographically distributed teams

About the Company

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by leading investors, K2 is mass-producing high-power satellite platforms for missions from LEO to deep space.

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Senior ASIC Physical Design Engineer

K2 Space · Seattle

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