Senior ASIC Digital Engineer

Responsibilities

• Lead the development and implementation of DFT architectures for complex ASIC designs
• Collaborate with cross-functional teams to integrate DFT solutions into the overall ASIC design flow
• Develop and optimize test patterns using Automatic Test Pattern Generation (ATPG) tools
• Implement Built-In Self-Test (BIST) solutions for various ASIC components
• Analyze and improve test coverage, fault coverage, and test time for ASIC designs
• Troubleshoot and debug DFT-related issues during the design and post-silicon phases
• Mentor junior engineers and contribute to the development of best practices and methodologies
• Participate in design reviews and provide technical guidance to ensure DFT requirements are met

Requirements

• Master's degree in Electrical Engineering, Computer Engineering, or a related field
• 7+ years of experience in ASIC development with a strong focus on DFT
• Expertise in Design for Testability (DFT) methodologies and techniques
• Strong programming skills in Verilog, VHDL, and C++
• Proficiency in using EDA tools for ASIC design, verification, and testing
• Experience with advanced DFT techniques, including BIST and ATPG
• Knowledge of low-power design techniques and industry standards like IEEE 1149.1 and IEEE 1500

About the Company

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world.