Senior ASIC Design Verification Engineer

Responsibilities

• Manage all aspects of digital SoC verification
• Plan and execute verification and validation of advanced automotive communication semiconductors and systems
• Collaborate with architects, designers, and software engineers
• Debug simulation failures to identify root causes

Requirements

• BS or MS in Electrical Engineering, Computer Science, or a related field
• Minimum 10+ years of ASIC verification experience
• Strong understanding of ASIC verification fundamentals and industry standard methodologies
• Proficiency with Verilog, SystemVerilog, UVM, Python, TCL, and C/C++
• Experience with the full verification flow from specification to coverage analysis and gate-level simulation

Preferred Qualifications

• Experience with networking protocols (Ethernet MAC, PHY, Switching, TCP/IP, PCIe)
• Experience with video standards, protocols, and processing
• Knowledge of digital signal processing filters
• Experience with third-party IP such as SerDes, controllers, or processors
• Expertise in modular and reusable testbench architecture
• Experience with automation of testbench creation, tests, regression, or EDA tools
• Knowledge of SystemC and/or DPI

About the Company

Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics, and other intelligent machines. The company provides breakthrough data transport and acceleration technology for highly reliable autonomy and AI-backed applications.