R&D Engineering, Sr Manager

Responsibilities

• Lead and mentor a team of engineers to develop cutting-edge CMOS embedded memories, including SP SRAM, DP SRAM, Register File, TCAM, and ROM
• Design architecture and circuit implementation for ultra-high-speed, ultra-low-power, or high-density design portfolios
• Perform schematic entry, circuit simulation, layout planning, and supervision
• Verify and validate designs to ensure high quality and performance
• Interface with CAD and Frontend engineers to automate memory compilers and generate EDA models
• Drive physical layout design and verification, including bit cell development

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Telecommunication, or a related field
• 8 to 10 years of professional experience in memory design or related fields
• Proficiency in CMOS memory design, circuit simulation, and memory layout design
• Hands-on experience with layout parasitic extraction and verification tools
• Strong leadership, mentoring, and interpersonal communication abilities
• Excellent analytical and problem-solving skills with high attention to detail

Benefits

• Comprehensive medical and healthcare plans
• Paid time away including ETO and FTO programs
• Family support including maternity/paternity leave and adoption assistance
• Employee Stock Purchase Plan (ESPP) with a 15% discount
• Competitive salaries and regional retirement plans

About the Company

Synopsys is a global leader in electronic design automation (EDA), chip design, verification, and IP integration. Our technology is central to the Era of Pervasive Intelligence, empowering the creation of high-performance silicon chips that drive innovation in industries ranging from self-driving cars to machine learning.